GPIO/EGRET Simulation Results

Saturday June 06 2026 03:15:30 UTC

GitHub Revision: 285e653a0b

Branch: main

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	gpio_smoke	1.530s	91.162us	50	50	100.00
		gpio_smoke_no_pullup_pulldown	1.570s	59.496us	50	50	100.00
		gpio_smoke_en_cdc_prim	1.090s	105.461us	50	50	100.00
		gpio_smoke_no_pullup_pulldown_en_cdc_prim	1.020s	189.467us	50	50	100.00
V1	csr_hw_reset	gpio_csr_hw_reset	0.770s	37.442us	5	5	100.00
V1	csr_rw	gpio_csr_rw	0.770s	28.654us	20	20	100.00
V1	csr_bit_bash	gpio_csr_bit_bash	2.670s	1.112ms	5	5	100.00
V1	csr_aliasing	gpio_csr_aliasing	0.980s	32.776us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	gpio_csr_mem_rw_with_rand_reset	1.590s	36.453us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	gpio_csr_rw	0.770s	28.654us	20	20	100.00
		gpio_csr_aliasing	0.980s	32.776us	5	5	100.00
V1		TOTAL			255	255	100.00
V2	direct_and_masked_out	gpio_random_dout_din	1.520s	160.017us	50	50	100.00
		gpio_random_dout_din_no_pullup_pulldown	1.290s	35.876us	50	50	100.00
V2	out_in_regs_read_write	gpio_dout_din_regs_random_rw	0.970s	113.600us	50	50	100.00
V2	gpio_interrupt_programming	gpio_intr_rand_pgm	1.660s	104.501us	50	50	100.00
V2	random_interrupt_trigger	gpio_rand_intr_trigger	3.480s	527.091us	50	50	100.00
V2	interrupt_and_noise_filter	gpio_intr_with_filter_rand_intr_event	3.250s	74.854us	50	50	100.00
V2	noise_filter_stress	gpio_filter_stress	18.470s	3.511ms	50	50	100.00
V2	regs_long_reads_and_writes	gpio_random_long_reg_writes_reg_reads	5.830s	535.349us	50	50	100.00
V2	full_random	gpio_full_random	1.120s	350.637us	50	50	100.00
V2	stress_all	gpio_stress_all	2.099m	12.298ms	50	50	100.00
V2	alert_test	gpio_alert_test	0.710s	28.925us	50	50	100.00
V2	intr_test	gpio_intr_test	0.740s	15.486us	50	50	100.00
V2	tl_d_oob_addr_access	gpio_tl_errors	2.210s	48.318us	20	20	100.00
V2	tl_d_illegal_access	gpio_tl_errors	2.210s	48.318us	20	20	100.00
V2	tl_d_outstanding_access	gpio_csr_rw	0.770s	28.654us	20	20	100.00
		gpio_same_csr_outstanding	0.980s	77.001us	20	20	100.00
		gpio_csr_aliasing	0.980s	32.776us	5	5	100.00
		gpio_csr_hw_reset	0.770s	37.442us	5	5	100.00
V2	tl_d_partial_access	gpio_csr_rw	0.770s	28.654us	20	20	100.00
		gpio_same_csr_outstanding	0.980s	77.001us	20	20	100.00
		gpio_csr_aliasing	0.980s	32.776us	5	5	100.00
		gpio_csr_hw_reset	0.770s	37.442us	5	5	100.00
V2		TOTAL			640	640	100.00
V2S	tl_intg_err	gpio_tl_intg_err	1.580s	1.523ms	20	20	100.00
		gpio_sec_cm	1.100s	122.763us	5	5	100.00
V2S	sec_cm_bus_integrity	gpio_tl_intg_err	1.580s	1.523ms	20	20	100.00
V2S		TOTAL			25	25	100.00
V3	straps_data	gpio_rand_straps	0.740s	43.388us	50	50	100.00
V3	stress_all_with_rand_reset	gpio_stress_all_with_rand_reset	11.050s	424.472us	0	50	0.00
V3		TOTAL			50	100	50.00
		TOTAL			970	1020	95.10

Testplan Progress

Items	Total	Written	Passing	Progress
V1	9	9	9	100.00
V2	14	14	14	100.00
V2S	2	2	2	100.00
V3	2	2	1	50.00

Coverage Results

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
98.23	99.76	99.57	93.43	--	99.80	96.84	100.00

Failure Buckets

• UVM_FATAL (cip_base_vseq.sv:1171) [gpio_common_vseq] Check failed (vseq_done) has 25 failures:
  • Test gpio_stress_all_with_rand_reset has 25 failures.

    • 0.gpio_stress_all_with_rand_reset.2365536855049773427165248810740542273954145934086025574668221343931318371800
      Line 83, in log /home/runner/_work/pavona/pavona/scratch/main/gpio_top_egret-sim-vcs/0.gpio_stress_all_with_rand_reset/latest/run.log

        UVM_FATAL @ 815088556 ps: (cip_base_vseq.sv:1171) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
        UVM_INFO @ 815088556 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
        
        
      

    • 10.gpio_stress_all_with_rand_reset.24049954862810226648091258813949608742839024742912023618246430708158990010079
      Line 87, in log /home/runner/_work/pavona/pavona/scratch/main/gpio_top_egret-sim-vcs/10.gpio_stress_all_with_rand_reset/latest/run.log

        UVM_FATAL @  10346403 ps: (cip_base_vseq.sv:1171) [uvm_test_top.env.virtual_sequencer.gpio_common_vseq] Check failed (vseq_done)
        UVM_INFO @  10346403 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
        
        
      

    • ... and 23 more failures.

• UVM_FATAL sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -* has 25 failures:
  • Test gpio_stress_all_with_rand_reset has 25 failures.

    • 1.gpio_stress_all_with_rand_reset.66634481667965842731908082884235303330334933070961751812445688368619634486235
      Line 80, in log /home/runner/_work/pavona/pavona/scratch/main/gpio_top_egret-sim-vcs/1.gpio_stress_all_with_rand_reset/latest/run.log

        UVM_FATAL @   3157747 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
        UVM_INFO @   3157747 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
        
        
      

    • 2.gpio_stress_all_with_rand_reset.12555259392014160387760287887399079219601336577227364940157203649586740812365
      Line 82, in log /home/runner/_work/pavona/pavona/scratch/main/gpio_top_egret-sim-vcs/2.gpio_stress_all_with_rand_reset/latest/run.log

        UVM_FATAL @ 354806196 ps: uvm_test_top.env.m_tl_agent_gpio_reg_block.sequencer [SEQDEFPRI] Sequence m_tl_host_base_seq has illegal priority: -1
        UVM_INFO @ 354806196 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
        
        
      

    • ... and 23 more failures.