PRIM_LFSR Simulation Results

Saturday June 06 2026 03:15:30 UTC

GitHub Revision: 285e653a0b

Branch: main

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 TOTAL 0 0 --
V2 TOTAL 0 0 --
V2S TOTAL 0 0 --
V3 TOTAL 0 0 --
Unmapped tests prim_lfsr_fib_test 1.768m 337.002ms 50 50 100.00
prim_lfsr_fib_smoke 1.370s 1.550ms 50 50 100.00
prim_lfsr_gal_test 1.702m 336.422ms 50 50 100.00
prim_lfsr_gal_smoke 1.260s 1.566ms 50 50 100.00
TOTAL 200 200 100.00

Testplan Progress

Items Total Written Passing Progress
N.A. 4 4 4 100.00

Coverage Results

SCORE LINE COND TOGGLE FSM BRANCH ASSERT
98.31 100.00 96.55 100.00 -- 100.00 95.00