USBDEV Simulation Results

Saturday July 04 2026 15:22:18 UTC

GitHub Revision: f2bc21ca1e

Branch: main

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.070s 214.250us 1 1 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.070s 70.530us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.110s 77.468us 3 3 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 7.120s 2.712ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 2.880s 322.264us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 1.390s 135.293us 3 3 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.110s 77.468us 3 3 100.00
usbdev_csr_aliasing 2.880s 322.264us 5 5 100.00
V1 mem_walk usbdev_mem_walk 3.560s 154.113us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.300s 167.811us 5 5 100.00
V1 TOTAL 32 32 100.00
V2 in_trans usbdev_in_trans 0.940s 185.945us 1 1 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 0.940s 468.535us 1 1 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.980s 101.206us 5 5 100.00
V2 av_buffer usbdev_av_buffer 0.650s 172.127us 1 1 100.00
V2 rx_fifo usbdev_pkt_buffer 32.180s 14.083ms 3 3 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.390s 325.963us 3 3 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 1.000s 172.196us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.050s 225.200us 1 1 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.250s 239.599us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.110s 218.417us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 0.970s 216.271us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 1.130s 149.306us 3 3 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.140s 187.128us 1 1 100.00
usbdev_stream_len_max 2.870s 1.257ms 1 1 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.160s 262.007us 1 1 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 1.060s 192.021us 1 1 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.010s 170.717us 1 1 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.070s 158.810us 1 1 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.000s 189.619us 1 1 100.00
V2 out_stall usbdev_out_stall 1.120s 203.299us 1 1 100.00
V2 in_stall usbdev_in_stall 0.880s 144.995us 1 1 100.00
V2 out_iso usbdev_out_iso 1.100s 165.660us 1 1 100.00
V2 in_iso usbdev_in_iso 1.170s 230.982us 1 1 100.00
V2 pkt_received usbdev_pkt_received 1.040s 207.771us 1 1 100.00
V2 pkt_sent usbdev_pkt_sent 1.160s 183.994us 1 1 100.00
V2 disconnected usbdev_disconnected 1.100s 136.491us 3 3 100.00
V2 host_lost usbdev_host_lost 9.890s 4.175ms 3 3 100.00
V2 link_reset usbdev_link_reset 1.160s 171.661us 3 3 100.00
V2 link_suspend usbdev_link_suspend 16.490s 10.838ms 6 6 100.00
V2 link_resume usbdev_link_resume 40.110s 30.124ms 3 3 100.00
V2 av_empty usbdev_av_empty 1.130s 145.198us 5 5 100.00
V2 rx_full usbdev_rx_full 1.400s 308.625us 5 5 100.00
V2 av_overflow usbdev_av_overflow 1.100s 151.037us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.190s 239.727us 1 1 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.110s 160.125us 3 3 100.00
V2 rx_pid_err usbdev_rx_pid_err 1.180s 249.320us 3 3 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 1.100s 155.993us 3 3 100.00
V2 link_out_err usbdev_link_out_err 1.550s 498.089us 1 1 100.00
V2 enable usbdev_enable 0.590s 36.140us 1 1 100.00
V2 resume_link_active usbdev_resume_link_active 22.090s 20.167ms 3 3 100.00
V2 device_address usbdev_device_address 1.093m 49.346ms 8 8 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.780s 426.251us 3 3 100.00
V2 setup_stage usbdev_setup_stage 1.030s 152.296us 1 1 100.00
V2 endpoint_access usbdev_endpoint_access 1.320s 783.262us 1 1 100.00
V2 disable_endpoint usbdev_disable_endpoint 1.210s 833.333us 1 1 100.00
V2 endpoint_types usbdev_endpoint_types 1.860s 641.897us 52 52 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.040s 182.944us 1 1 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 1.140s 201.209us 3 3 100.00
V2 nak_trans usbdev_nak_trans 1.230s 263.686us 4 4 100.00
V2 stall_trans usbdev_stall_trans 1.140s 180.859us 1 1 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.380s 310.875us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.120s 207.912us 1 1 100.00
V2 pending_in_trans usbdev_pending_in_trans 1.080s 142.095us 1 1 100.00
V2 streaming_test usbdev_streaming_out 37.780s 2.075ms 1 1 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.317m 115.179ms 5 5 100.00
usbdev_freq_loclk 2.615m 104.141ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 2.364m 116.248ms 5 5 100.00
usbdev_freq_loclk_max 2.398m 98.122ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.461m 104.126ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 18.220s 3.227ms 1 1 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 13.670s 3.224ms 1 1 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 8.480s 809.796us 1 1 100.00
V2 device_timeout usbdev_device_timeout 6.260s 586.410us 1 1 100.00
V2 packet_buffer usbdev_pkt_buffer 32.180s 14.083ms 3 3 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.850s 545.669us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 19.420s 31.270ms 1 1 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 16.260s 13.437ms 3 3 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 13.380s 11.683ms 5 5 100.00
V2 invalid_sync usbdev_invalid_sync 1.266m 4.059ms 1 1 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 38.110s 1.990ms 1 1 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 1.410m 4.361ms 5 5 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 47.680s 3.726ms 3 3 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 1.285m 4.015ms 3 3 100.00
V2 rand_suspends usbdev_rand_suspends 53.150s 10.164ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.041m 3.548ms 3 3 100.00
usbdev_max_usb_traffic 1.001m 3.170ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 1.043m 14.360ms 4 4 100.00
V2 in_packet_retraction usbdev_iso_retraction 1.230m 8.367ms 3 3 100.00
V2 data_toggle_restore usbdev_data_toggle_restore 1.950s 665.403us 6 6 100.00
V2 setup_priority usbdev_setup_priority 1.590s 406.292us 3 3 100.00
V2 fifo_resets usbdev_fifo_rst 1.670s 529.228us 1 1 100.00
V2 tx_rx_disruption usbdev_tx_rx_disruption 1.690s 508.446us 7 7 100.00
V2 fifo_levels usbdev_fifo_levels 1.420s 292.880us 56 56 100.00
V2 rxenable_out_conditional usbdev_rxenable_out 1.110s 160.585us 5 5 100.00
V2 intr_test usbdev_intr_test 1.000s 75.936us 6 6 100.00
V2 alert_test usbdev_alert_test 0.890s 45.365us 3 3 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.610s 292.840us 4 4 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.610s 292.840us 4 4 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.070s 70.530us 5 5 100.00
usbdev_csr_rw 1.110s 77.468us 3 3 100.00
usbdev_csr_aliasing 2.880s 322.264us 5 5 100.00
usbdev_same_csr_outstanding 1.940s 206.805us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.070s 70.530us 5 5 100.00
usbdev_csr_rw 1.110s 77.468us 3 3 100.00
usbdev_csr_aliasing 2.880s 322.264us 5 5 100.00
usbdev_same_csr_outstanding 1.940s 206.805us 20 20 100.00
V2 TOTAL 368 368 100.00
V2S tl_intg_err usbdev_sec_cm 1.430s 461.127us 3 3 100.00
usbdev_tl_intg_err 4.670s 843.584us 7 7 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 4.670s 843.584us 7 7 100.00
V2S TOTAL 10 10 100.00
V3 dpi_config_host usbdev_dpi_config_host 1.805m 5.106ms 3 3 100.00
V3 TOTAL 3 3 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 0.890s 31.680us 0 10 0.00
usbdev_stress_all 0.800s 0 1 0.00
TOTAL 413 424 97.41

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 87 87 87 100.00
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
96.68 98.79 95.53 95.74 93.22 98.34 96.20 98.91

Failure Buckets