PRIM_PRESENT Simulation Results

Sunday August 30 2026 03:04:43 UTC

GitHub Revision: 2aab100d17

Branch: main

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Max Wall Clock Simulated Time Passing Total Pass Rate
V1 TOTAL 0 0 --
V2 TOTAL 0 0 --
V2S TOTAL 0 0 --
V3 TOTAL 0 0 --
Unmapped tests prim_present_test 11.610s 24.138s 8.670ms 3 3 100.00
TOTAL 3 3 100.00

Testplan Progress

Items Total Written Passing Progress
N.A. 1 1 1 100.00

Coverage Results

SCORE LINE COND TOGGLE FSM BRANCH ASSERT
93.41 90.41 100.00 76.63 -- 100.00 100.00

Simulation Wall Clock Time

Target Elapsed
build 00:06:40
run 14:15:03
cov_merge 14:15:15
cov_report 14:15:22
Total 14:15:22